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Semitronix in the 55th Design Automation Conference Time:2018-06-29 Click:661

The 55th Design Automation Conference (DAC 2018) was held successfully at Moscone Center, San Francisco, USA from June 25th to 27th.  As a leading provider of semiconductor characterization and yield improvement solutions, Semitronix made its debut at this event.



At the exhibit, Semitronix introduced the advanced electrical characterization eco-system that was already proven with our industry leading customers from 180nm to 5nm technology nodes. Particularly, we highlighted two recent innovations, dense array technology and high speed parametric tester. Dense array offers ultra-fast and high-density design and test for hundreds of millions of transistors on a single wafer, which was already proven out with multiple customers. The tester on the hand, through its innovative system level design and software optimization, offers an much more efficient alternative to industry standard wafer-level parametric testing equipment. We appreciate the broad interest and technical exchange from many of the leading companies participated in the event.





We find DAC 2018 to be a resounding success where out brand and products were recognized and introduced to a broader spectrum of industry peers. The feedback also helps us align our future development with their needs and challenges. We look forward to bringing our future innovations to DAC 2019 next year.